Infineon at OCP Global Summit 2026
OCP Global Summit returns to San Jose October 12–15, and AI infrastructure is again high on the agenda. As AI rack power scales from tens to hundreds of kilowatts and beyond, the industry is rethinking how power is delivered and managed across the data center. Traditional server-centric designs are giving way to more disaggregated architectures, with power conversion, battery backup and protection increasingly moving into dedicated sidecars and power racks to free space for compute and improve efficiency. At the same time, higher-voltage DC distribution is gaining momentum as a way to support the next generation of high-density AI infrastructure. This hub brings together executive insights, technical articles, reference designs and OCP sessions exploring the evolution of AI power architectures and will be updated throughout the event.
Infineon at OCP
Where to find Infineon at the OCP Global Summit 2026, and the sessions its engineers are presenting.
- Event
- OCP Global Summit 2026
- Dates
- October 12–15, 2026
Expo: Tuesday–Thursday - Location
- San Jose Convention Center, San Jose, California
- Theme
- Scaling Innovation for the AI Era
- Booth
- E26
- Demos
- Latest innovations and products for:SSTSSCBPSUBBUIBCProtectionII stage
Speaking sessions
| Day / time | Room | Session | Speaker |
|---|---|---|---|
| Wed, Oct 149:30 AM | SJCC – Lower Level – LL20BCD | Poster session Energy Buffer to meet the peak power demands in AI server PSUs without disturbing the grid | Sam Abdel-Rahman |
| Thu, Oct 159:45 AM | SJCC – Concourse Level – 212 | Talk Future-proof security in TPM with SPDM and PQC capabilities | Antonio Cabrera Gutierrez |
| Thu, Oct 1511:15 AM | SJCC – Concourse Level – 211 | Talk Bunch of Wires Flexi 1.0: a low cost, low power D2D interface | Morgan Whately |
Engineering AI Rack Power: Infineon Answers the Questions Asked at OCP
Three Infineon technology leaders take the questions engineers raised at OCP 2026 and the ones you submit at registration: 800 V DC distribution, solid-state transformers and breakers, sidecar power racks, and what to design for in 2027. Live and moderated, 60 minutes.
Carl SmithSenior Director, We Power AI
Davide ChiolaVice President, System Solutions
Michael WilliamsProduct and Application Marketing, Industrial and Infrastructure
Register to Reserve Your Seat and Unlock Infineon’s Exclusive Content Hub
Executive interviews, technical documents and reference designs from Infineon on powering the AI data center, plus a live expert panel after OCP Global Summit. Register once to unlock everything and reserve your seat for the panel.
Data center selection guide41 pages
The future of powering AI24 pages
SST whitepaper5 pagesCheck your email
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Also in this hub
Executive Interview Series
Ahead of OCP Global Summit, Infineon leaders share their perspectives on the challenges and innovations shaping the future of AI data center architecture.
Fanny Björk, who runs application marketing for grid to load at Infineon, explains why the 50 V rack bus is reaching its limit as rack power climbs toward megawatt scale. She covers the move to 800 V DC distribution, centralized AC/DC conversion in the gray space, and solid-state transformers that remove one isolated conversion stage for roughly 1% higher efficiency. She discusses solid-state circuit breakers that isolate DC faults in microseconds, and on-site generation and storage for gigawatt sites.
Giuseppe Bernacchia, distinguished engineer and system architect for Infineon’s AI data center work, explains why protection at 800 V is harder than scaling up the 12 V or 50 V schemes customers are used to. He covers the trade-off between safe operating area and on-resistance that makes silicon carbide the device of choice, digital hot-swap controllers that ride through GPU training transients without tripping, why solid-state breakers still need a mechanical relay for human safety, and the paralleling and current-sensing problems waiting at megawatt racks.
Surendhar Somasundaram, principal engineer for Infineon’s VRM power modules, explains what happens when voltage regulators move into the shadow of a multi-kilowatt ASIC. He covers why vertical power delivery cuts PDN impedance to a quarter or a fifth of a lateral layout, the fight for space with decoupling capacitors as load steps reach 2,000 A in under a microsecond, how TLVR and coupled magnetics buy back transient response, the 2 to 4 A per mm² density roadmap, and the thermal and solder-reliability limits that cap it.
Technical resources
Guides and whitepapers from Infineon. Free with a short registration form.
Data center semiconductor selection guide
Power engineers designing AI server racks face a topology fork: today's 48 V single-phase infrastructure tops out around 250 kW per rack, while GPU clusters already push beyond that. Infineon engineers lay out every conversion stage from medium-voltage AC input to sub-1 V core rail, with validated reference design and solutions for each node.
Download
Redefining the power flow in and beyond AI data centers
As AI power demand scales from kilowatt-level processors to megawatt racks and gigawatt-scale campuses, traditional power architectures are reaching their limits. This whitepaper explores seven key predictions for the future of AI power delivery, from vertical power delivery and high-voltage server boards to disaggregated rack architectures, HVDC distribution and data center-wide DC microgrids.
Download
Why line-frequency transformers fall short in AI data center power design
For electrical engineers specifying medium-voltage distribution in large-scale data centers, the conventional line-frequency transformer is increasingly the wrong tool—it cannot regulate power flow, interface with DC buses, or scale to the multi-megawatt modular blocks that AI workloads demand. Infineon engineers lay out the technical case for solid-state transformers as a direct architectural response to those gaps.
DownloadProduct highlights
Devices and reference designs Infineon is bringing to OCP, with links to datasheets, application notes and design files.
CoolSiC™ MOSFET bidirectional switch (BDS) 750 V
Built on rugged CoolSiC™ G2 technology, the IMDQ75BxxxM2H integrates two SiC power switches in a dual-die common-drain architecture within a top-side-cooled Q-DPAK package. It simplifies system design, enables next-generation topologies and delivers high reliability, efficiency and low lifetime TCO. Key applications include server PSUs, UPS and BESS.
XDP™ XDP8HD40S-1 high-voltage hot-swap controller
Built for next-generation AI server power architectures, the XDP8HD40S-1 integrates hot-swap protection, monitoring and digital power-path control for ±400 V and 800 VDC systems: digital SOA control, integrated gate driving for SiC cascode stages, precision telemetry and PMBus® connectivity. Applications include AI servers, high-voltage rack power delivery, intermediate bus converters, battery backup and peak shaving.
EiceDRIVER™ 2EDL6014AC-G2D and 2EDL90xG3 gate drivers
The 2EDL90xG3 is a 120 V gate driver with a common PCB footprint for Si and GaN designs, for AI data center PSUs, 48 V systems, HV-IBCs, BBUs and solid-state transformers. The compact 2EDL6014AC-G2D, a 120 V dual-channel floating gate driver, is optimized for high-density silicon designs such as switched-capacitor and multilevel converters.
New 48 V-to-12 V ILVB IBC reference design
Built for high-TDP rails and demanding transients, this reference design delivers 1.8 kW continuous. Its regulated 4:1 transformer-less architecture offers 1.7x higher power density and about 40% lower $/kW than standard regulated solutions. The XDP™ digital controller scales from one phase at 300 W to 16 phases at 4.8 kW, in full-Si and full-GaN versions.
OptiMOS™ 7 40 V switching-optimized MOSFET
Versus the previous-generation OptiMOS 6 BSC007N04LS6SC, this 40 V MOSFET achieves up to 56% lower Qgd, a 36% better RDS(on) × Qg figure of merit (at 4.5 V) and 24% lower QOSS. That means lower switching losses, higher switching frequencies and more power density in high-power DC-DC converters, HV-IBCs and 48 V conversion.
CoolGaN™ Transistors
Explore CoolGaN™ Transistors, discrete and integrated normally-off devices, ranging from 60 V up to 700 V, for highest efficiency and power density.
Roadmaps & further reading
Product roadmaps for the main power blocks in an AI server rack, plus Infineon’s application notes, webinars and podcast.
Data center power solutions
Read on infineon.com →Server PSU roadmap
Read on infineon.com →Battery backup unit (BBU) roadmap
Read on infineon.com →Voltage regulator module (VRM) roadmap
Read on infineon.com →Understanding and using power system reliability modeling (app note)
Read on infineon.com →We Power AI webinar series
Read on infineon.com →We Power AI podcast
Read on infineon.com →Latest from Infineon
Infineon introduces XDP8HD40S-1 high-voltage hot-swap controller for 800 VDC AI server architectures
Announced October 12: a hot-swap controller for digital power-path protection and monitoring at ±400 V and 800 VDC, with digital SOA control, an integrated gate driver for SiC cascode stages, PMBus® 1.5, black-box event recording and 12-bit telemetry. Samples are targeted for Q2 2027.
Read on infineon.com →
Infineon introduces 27 kW three-phase PSU solution for next-generation AI server power architectures
Announced October 8: an ORV3-compliant reference design for 800 VDC and ±400 VDC racks with a five-level ANPC PFC and three-level LLC, more than 98% peak efficiency, 116 W/in³ and an integrated 20 ms energy buffer that removes the separate capacitor bank unit. On show at booth E26.
Read on infineon.com →
This resource hub is sponsored by Infineon Technologies. Content provided by Infineon; interviews and editorial by The Data Center Engineer.