PCI-SIG unveils PCI Express 8.0 specification, targeting 256.0 GT/s for future data center applications

PCI-SIG has announced the upcoming PCI Express 8.0 specification, which targets a raw bit rate of 256.0 gigatransfers per second (GT/s)—doubling the data rate of the newly-released PCI Express 7.0. The PCI Express 8.0 specification is planned for member release by 2028, aiming to address requirements for high-throughput data center workloads and other advanced computing uses formally described in the announcement.

According to PCI-SIG, development for PCI Express 8.0 will pursue multiple technical objectives: providing up to 1 terabyte per second (TB/s) bi-directional data transfer in a sixteen-lane (x16) configuration; reviewing new connector technologies; confirming latency and forward error correction (FEC) targets; ensuring reliability requirements; maintaining full backwards compatibility with prior PCI Express versions; enhancing protocol features for improved bandwidth; and continuing power reduction focus.

PCI-SIG notes that the PCI Express 8.0 specification is intended to support rapid advancements in artificial intelligence, machine learning, high-speed networking, edge computing, and quantum computing, as well as application segments including automotive, hyperscale data centers, high-performance computing, and military or aerospace hardware.

Reece Hayden, Principal Analyst at ABI Research, said, “As artificial intelligence and other data-intensive applications continue to scale rapidly, PCIe technology demand will be sustained in the long run due to its high bandwidth, scalability and power efficiency.” Hayden continued, “Data center networks are already preparing to implement PCIe 6.0 technology and are showing great interest in the PCIe 7.0 specification. The introduction of the PCIe 8.0 specification further ensures that the industry’s bandwidth requirements will be supported well into the future.”

Source: PCI-SIG

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