JEDEC has published JESD330-4, the finalized specification for Standard Package High Bandwidth Memory (SPHBM4), and made the document available for download. It covers memory built on the same dies as HBM4 (High Bandwidth Memory), the stacks that feed AI accelerators, but packaged to mount on standard organic substrates rather than the silicon substrates HBM4 requires. The Data Center Engineer covered SPHBM4 while the specification was still a draft; JESD330-4 is the completed, published version.

HBM exists because AI accelerators need far more memory bandwidth than conventional memory packages deliver, and SPHBM4 keeps that bandwidth while changing the package it sits on. A new interface base die does the work. Where the HBM4 interface carries 2,048 data signals, SPHBM4 defines 512 and applies 4:1 serialization, clocking higher to reach the same aggregate bandwidth. Serialization time-multiplexes several bits onto each line, so a narrower, faster interface moves the same data and relaxes the bump pitch enough to connect to an organic substrate. Trading wire count for speed leans harder on signal integrity, a familiar tension in serialized memory links.

Organic substrates are cheaper to manufacture than silicon and can be built at larger sizes, the appeal of moving HBM-class memory off the silicon packages HBM4 needs. Capacity per stack is unchanged, since SPHBM4 reuses the same memory core layers as HBM4. Organic-substrate routing also supports a longer channel length between the system-on-chip (SoC) and the memory, and that extra reach could increase the number of SPHBM stacks a system connects to, potentially raising its total memory capacity.

Source: JEDEC