ST adds 800 VDC AI data center converters with 12V and 6V outputs

STMicroelectronics has added two new 800 VDC power-conversion architectures aimed at AI data centers: direct 800 VDC-to-12 V and 800 VDC-to-6 V stages. The new designs follow the NVIDIA 800 VDC reference design and extend ST’s existing 800 VDC-to-50 V stage, widening the set of intermediate bus options available for high-density AI racks.

The company is pitching the combination of 50 V, 12 V, and 6 V intermediate DC buses as a portfolio that can map to different AI server form factors, including variations in GPU generation, server height, and thermal envelope. ST also ties the work to “gigawatt-scale compute infrastructure,” where distribution voltage, conversion step count, and copper losses become increasingly painful at high current.

What’s new: 800 VDC to 12 V and 800 VDC to 6 V

The 800 VDC-to-12 V converter targets high-efficiency distribution from rack-level power shelves down to voltage domains feeding AI accelerators. ST says the architecture eliminates the traditional 54 V intermediate stage, with the goal of reducing conversion steps and system-level losses. The company also describes a newly developed high-density power delivery board (PDB) intended to hit efficiency targets “exceeding the sum of previous two-stage conversion paths.”

For 800 VDC-to-6 V, ST describes a path meant to place conversion closer to the GPU, reducing IR drop and improving response under fast load transients. In practice, moving a lower-voltage bus nearer to the load can trade mechanical complexity and thermal design work for better electrical behavior at the point of load—something operators care about as GPU power profiles get spikier and rack densities climb.

Device and process technologies

Across the three stages (50 V, 12 V, and 6 V), ST is combining power semiconductors spanning silicon, SiC, and GaN, along with analog and mixed-signal components and microcontrollers. The company also points to “custom design at both chip and package levels” as part of the implementations.

ST also referenced an earlier prototype from October 2025: a fully integrated power-delivery system using a GaN-based LLC converter running directly from 800 V at 1 MHz, with over 98% efficiency and power density exceeding 2,600 W/in³ at a 50 V output, in a “smartphone-sized footprint.”

“As AI infrastructure compute scale continues to expand fast, it requires higher voltage distribution and greater density, which can only be achieved with system-level innovation for each of the different AI server form factors,” said Marco Cassis, President, Analog, Power & Discrete, MEMS and Sensors Group Head of STMicroelectronics’ Strategy, System Research and Applications, Innovation Office at STMicroelectronics.

Additional technical information is posted at blog.st.com/800-v-hvdc-data-center.