Hybrid optoelectronic AI computing architecture claims no active cooling needed

Artilux has introduced Inception, a hybrid optoelectronic architecture the company is targeting at next-generation AI computing, with the goal of improving power and area efficiency versus conventional digital electronics.

The company is aiming Inception at AI workloads where scaling pressure shows up as higher energy use, larger chips, heavier data movement, and harder thermal management. Inception combines photonics and electronics in a unified system, built around what Artilux describes as an optoelectronics-enabled hybrid systolic array architecture that is compatible with existing CPU, GPU, TPU, and LPU systems. Artilux says the architecture is intended to run large-scale general matrix–matrix multiplication (GEMM) with no data skew and negligible propagation delay.

A key element is a dense 2D array of “optoelectronic neurons” (OENs) used for parallel dot-product computation. Artilux describes each OEN as including a light emitter (for example, a GaN micro-LED), a photodetector (for example, a GeSi pixel), and in-pixel memory. In the described flow, inputs and weights for multiply-and-accumulate (MAC) operations are represented via modulation of the light emitter and the photodetector, followed by local charge storage and programmable activation. Artilux says this removes the need to use conventional pipelined digital Arithmetic Logic Units (ALUs) for GEMM.

For data center engineers, the “no active cooling” claim is the one that jumps out—but it’s tightly coupled to power density, packaging, and how much ancillary conversion and I/O the system needs around the compute core. Artilux is explicitly tying its architecture to reduced data movement as well: the company says inputs and weights fetched from external memory are fully reused during computations, cutting memory bandwidth demand and data movement energy, while supporting high-speed dynamic weight updates for transformer-based workloads.

Artilux says Inception can be built using mature CMOS nodes and integration technologies compatible with existing semiconductor manufacturing infrastructure. “AI scaling cannot rely solely on advanced process nodes,” said Neil Na, co-founder and CTO of Artilux. “With Artilux Inception, we introduce a new AI computing paradigm—one that is grounded in first-principle thinking, and enabled by seamless integration of photonic and electronic systems.”

The company points to a paper describing the architecture—“Implementation of transformer-based LLMs with large-scale optoelectronic neurons on a CMOS compatible platform”—published in APL Machine Learning. Artilux also says a first-generation processing core based on Inception is under development. The company’s targets for that core are over 12,000 TOPS (INT8) at approximately 50 mW/mm² power density using a standard GHz clock rate, including drivers, DACs, ADCs, and peripheral interfaces.