Chroma — leaderboard

Data center interconnects boosted as CXL Consortium releases CXL 4.0 specification

The CXL Consortium has released the Compute Express Link (CXL) 4.0 specification, increasing interconnect bandwidth to address scaling and performance demands in data centers and emerging heterogeneous computing environments. The new CXL 4.0 specification, now publicly available, doubles the bandwidth from 64 giga-transfers per second (GT/s) to 128 GT/s without adding latency. The Consortium reports this release as advancing memory and accelerator connectivity in data center servers, enabling rapid data movement between CXL-attached components.

According to the CXL Consortium, CXL 4.0 maintains protocol features from CXL 3.x, including the 256-byte flit format, and introduces native x2 width to support higher fan-out in platforms. The update enables up to four retimers per channel to support greater reach and implements bundled port capabilities. This allows device ports between hosts and CXL-based accelerators (Type 1 and Type 2 devices) to be combined for increased connection bandwidth.

The new specification also includes memory Reliability, Availability, and Serviceability (RAS) enhancements, with the goal of improving error visibility and maintenance efficiency. CXL 4.0 is fully backward compatible with CXL versions 3.x, 2.0, 1.1, and 1.0. These features collectively target high-performance data center computing, storage, and memory devices as described by the Consortium.

CXL Consortium members will demonstrate CXL 4.0 and related technologies at Supercomputing 2025 (SC25) from November 16 to 21, 2025, in St. Louis. Technical sessions, including discussions on CXL memory pooling and sharing for artificial intelligence (AI) and high-performance computing (HPC) workloads, are planned.

“The release of the CXL 4.0 specification sets a new milestone for advancing coherent memory connectivity, doubling the bandwidth over the previous generation with powerful new features,” said Derek Rohde, CXL Consortium President and Treasurer, and Principal Engineer at NVIDIA. “This release reflects our member companies’ commitment to driving open standards that empower data center innovation, support compliance and interoperability, and enable the entire industry to scale for future usage models.”

For detailed specification access and technical deep dives, the CXL Consortium leadership and technical task force are hosting a public webinar on December 4, 2025.

Source: CXL Consortium

Chroma — below posts

Get Data Center Engineering News In Your Inbox:

By subscribing, you agree to our Privacy Policy and Terms of Use. You can unsubscribe at any time.

Chroma — tower

Popular Posts:

Quantumscape
Batteries in the AI factory: from spare tire to shock absorber
20260803015848EDT_image_1
Water quality sensors enable real-time monitoring for liquid-cooled AI data centers
Johnson-Controls-has-launched-an-Absorption-Chiller-Reference-Design-Guide-aimed-at-data-centers-running-on-on-site-power-generation
Johnson Controls' new absorption chiller guide targets 44% lower cooling power in AI data centers
Why data center power validation is moving to real-time simulation
Why data center power validation is moving to real-time simulation
Emerson's new DeltaV automation platform unifies data center power and cooling control
Emerson's new DeltaV automation platform unifies data center power and cooling control

Share Your Data Center Engineering News

Do you have a new product announcement, webinar, whitepaper, or article topic? 

TDK — tower ()

Get Data Center Engineering News In Your Inbox:

By subscribing, you agree to our Privacy Policy and Terms of Use. You can unsubscribe at any time.

TDK — leaderboard ()