MIPS details S8200 RISC-V neural processing unit IP for autonomous edge AI workloads

MIPS, a GlobalFoundries company, has unveiled details of the MIPS S8200 processor intellectual property (IP), a RISC-V neural processing unit (NPU) positioned to run transformer and agentic language AI models on embedded, autonomous edge platforms. MIPS says the S8200 is part of its Atlas family of RISC-V processor IP and is aimed at “standards-based, scalable Physical AI” for autonomous edge deployments.

According to MIPS, the S8200 targets multimodal “Physical AI” workloads that combine multiple neural network types, including vision, radar, and speech, along with contextual awareness. MIPS also frames the S8200 as “software-first,” with model optimization starting on a virtual platform rather than waiting for silicon, using its Atlas Explorer virtual platform and “Core Models” intended for hardware and software co-design.

ForwardEdge ASIC, a wholly owned subsidiary of Lockheed Martin focused on “trusted microelectronics solutions for mission-critical applications,” has selected the MIPS S8200 for an upcoming high-performance application-specific integrated circuit (ASIC) intended for autonomous platforms. “Our mission to build high-performance solutions for autonomous platforms requires class-leading performance and area density when running the latest AI models,” said Frank Ferrante, CEO ForwardEdge ASIC. “MIPS S8200 delivers the superior performance and efficiency we need for our advanced mission-critical platforms.”

MIPS reports it expects to sample its first silicon reference platforms featuring the MIPS S8200 in 2027. MIPS says these evaluation platforms will be used to demonstrate performance and efficiency and to support ecosystem toolchain development for RISC-V adoption, including Vector and Matrix extensions, in autonomous edge applications.

MIPS also said it will show its Physical AI solutions at CES 2026 at the Las Vegas Convention Center (LVCC) West Hall, Booth 3253.

Source: MIPS

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